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  1. general description the 74lvc2gu04 provides two inverters. each inverter is a single stage with unbuffered output. the inputs can be driven from either 3.3 v or 5 v devices. this feature allows the use of this device in a mixed 3.3 v and 5 v environment. 2. features and benefits ? wide supply voltage range from 1.65 v to 5.5 v ? 5 v tolerant input/output for interfacing with 5 v logic ? high noise immunity ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? ? 24 ma output drive (v cc =3.0v) ? cmos low power consumption ? latch-up performance exceeds 250 ma ? input accepts voltages up to 5 v ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? c to +125 ? c 3. ordering information 74lvc2gu04 dual inverter rev. 8 ? 3 july 2012 product data sheet table 1. ordering information type number package temperature range name description version 74lvc2gu04gw ? 40 ? cto+125 ? c sc-88 plastic surface-mounted package; 6 leads sot363 74lvc2gu04gv ? 40 ? cto+125 ? c tsop6 plastic surface-mounted package (tsop6); 6 leads sot457 74lvc2gu04gm ? 40 ? cto+125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1.45 ? 0.5 mm sot886 74lvc2gu04gf ? 40 ? c to +125 ? c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 ? 1 ? 0.5 mm sot891 74LVC2GU04GN ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 0.9 ? 1.0 ? 0.35 mm sot1115 74lvc2gu04gs ? 40 ? c to +125 ? c xson6 extremely thin small outline package; no leads; 6 terminals; body 1.0 ? 1.0 ? 0.35 mm sot1202
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 2 of 19 nxp semiconductors 74lvc2gu04 dual inverter 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram 6. pinning information 6.1 pinning table 2. marking codes type number marking [1] 74lvc2gu04gw yd 74lvc2gu04gv vu4 74lvc2gu04gm yd 74lvc2gu04gf yd 74LVC2GU04GN yd 74lvc2gu04gs yd fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram (one gate) 1a 1y 1 6 mnb106 2a 2y 3 4 6 1 1 1 mnb107 4 3 mna636 a y 100 v cc v cc fig 4. pin configuration sot363 and sot457 fig 5. pin configuration sot886 fig 6. pin configuration sot891, sot1115 and sot1202 74lvc2gu04 1a 1y gnd 2a 2y 001aab680 1 2 3 6 v cc 5 4 74lvc2gu04 gnd 001aab681 1a 2a v cc 1y 2y transparent top view 2 3 1 5 4 6 74lvc2gu04 gnd 001aag421 1a 2a v cc 1y 2y transparent top view 2 3 1 5 4 6
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 3 of 19 nxp semiconductors 74lvc2gu04 dual inverter 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. 8. limiting values [1] the minimum input and output voltage ratings may be exceed ed if the input and output current ratings are observed. [2] when v cc = 0 v (power-down mode), the output voltage can be 5.5 v in normal operation. [3] for sc-88 and sc-74 packages: above 87.5 ? c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 118 ? c the value of p tot derates linearly with 7.8 mw/k. table 3. pin description symbol pin description 1a 1 data input gnd 2 ground (0 v) 2a 3 data input 2y 4 data output v cc 5 supply voltage 1y 6 data output table 4. function table [1] input output na ny lh hl table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +6.5 v i ik input clamping current v i < 0 v ? 50 - ma v i input voltage [1] ? 0.5 +6.5 v i ok output clamping current v o < 0 v ? 50 - ma v o output voltage active mode [1] [2] ? 0.5 v cc + 0.5 v i o output current v o = 0 v to v cc - ? 50 ma i cc supply current - 100 ma i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ?c [3] - 250 mw
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 4 of 19 nxp semiconductors 74lvc2gu04 dual inverter 9. recommended operating conditions 10. static characteristics table 6. recommended operating conditions voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 5.5 v v i input voltage 0 - 5.5 v v o output voltage active mode 0 - v cc v t amb ambient temperature ? 40 - +125 ?c ? t/ ? v input transition rise and fall rate v cc = 1.65 v to 2.7 v - - 20 ns/v v cc = 2.7 v to 5.5 v - - 10 ns/v table 7. static characteristics at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit t amb = ? 40 ? c to +85 ?c [1] v ih high-level input voltage v cc = 1.65 v to 5.5 v 0.75 ? v cc -- v v il low-level input voltage v cc = 1.65 v to 5.5 v - - 0.25 ? v cc v v oh high-level output voltage v i = v ih or v il i o = ? 100 ? a; v cc = 1.65 v to 5.5 v v cc ?? 0.1 - - v i o = ? 4 ma; v cc = 1.65 v 1.2 - - v i o = ? 8 ma; v cc = 2.3 v 1.9 - - v i o = ? 12 ma; v cc = 2.7 v 2.2 - - v i o = ? 24 ma; v cc = 3.0 v 2.3 - - v i o = ? 32 ma; v cc = 4.5 v 3.8 - - v v ol low-level output voltage v i = v ih or v il i o = 100 ? a; v cc = 1.65 v to 5.5 v --0 . 1v i o = 4 ma; v cc =1.65 v - - 0.45 v i o = 8 ma; v cc = 2.3 v - - 0.3 v i o = 12 ma; v cc = 2.7 v - - 0.4 v i o = 24 ma; v cc = 3.0 v - - 0.55 v i o = 32 ma; v cc = 4.5 v - - 0.55 v i i input leakage current v i = 5.5 v or gnd; v cc =0vto5.5v [2] - ? 0.1 ? 5 ? a i cc supply current v i = 5.5 v or gnd; i o = 0 a; v cc = 1.65 v to 5.5 v -0.110 ? a c i input capacitance v cc =3.3v; v i = gnd to v cc -5-p f
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 5 of 19 nxp semiconductors 74lvc2gu04 dual inverter [1] all typical values are measured at t amb = 25 ? c. [2] these typical values are measured at v cc =3.3v. t amb = ? 40 ? c to +125 ?c v ih high-level input voltage v cc = 1.65 v to 5.5 v 0.8 ? v cc -- v v il low-level input voltage v cc = 1.65 v to 5.5 v - - 0.2 ? v cc v v oh high-level output voltage v i = v ih or v il i o = ? 100 ? a; v cc = 1.65 v to 5.5 v v cc ?? 0.1 - - v i o = ? 4 ma; v cc = 1.65 v 0.95 - - v i o = ? 8 ma; v cc = 2.3 v 1.7 - - v i o = ? 12 ma; v cc = 2.7 v 1.9 - - v i o = ? 24 ma; v cc = 3.0 v 2.0 - - v i o = ? 32 ma; v cc = 4.5 v 3.4 - - v v ol low-level output voltage v i = v ih or v il i o = 100 ? a; v cc = 1.65 v to 5.5 v --0.1v i o = 4 ma; v cc =1.65 v - - 0.7 v i o = 8 ma; v cc = 2.3 v - - 0.45 v i o = 12 ma; v cc = 2.7 v - - 0.6 v i o = 24 ma; v cc = 3.0 v - - 0.8 v i o = 32 ma; v cc = 4.5 v - - 0.8 v i i input leakage current v i = 5.5 v or gnd; v cc =0vto5.5v -- ? 20 ? a i cc supply current v i = 5.5 v or gnd; i o = 0 a; v cc = 1.65 v to 5.5 v --40 ? a table 7. static characteristics ?continued at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 6 of 19 nxp semiconductors 74lvc2gu04 dual inverter 11. dynamic characteristics [1] typical values are measured at t amb =25 ? c and v cc = 1.8 v, 2.5 v, 2.7 v, 3.3 v and 5.0 v respectively. [2] t pd is the same as t plh and t phl . [3] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l ? v cc 2 ? f o ) = sum of outputs. 12. waveforms table 8. dynamic characteristics voltages are referenced to gnd (ground = 0 v). for test circuit see figure 8 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay na to ny; see figure 7 [2] v cc = 1.65 v to 1.95 v 0.5 2.3 5.0 0.5 6.3 ns v cc = 2.3 v to 2.7 v 0.3 1.8 4.0 0.3 5.0 ns v cc = 2.7 v 0.3 2.6 4.5 0.3 5.6 ns v cc = 3.0 v to 3.6 v 0.3 2.3 3.7 0.3 4.5 ns v cc = 4.5 v to 5.5 v 0.3 1.7 3.0 0.3 3.8 ns c pd power dissipation capacitance v i = gnd to v cc ; v cc = 3.3 v [3] -7.8- pf measurement points are given in table 9 . v ol and v oh are typical output voltage drop that occur with the output load. fig 7. the input (na) to output (ny) propagation delay times mna344 t phl t plh v m v m v m v m na input ny output gnd v i v oh v ol
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 7 of 19 nxp semiconductors 74lvc2gu04 dual inverter table 9. measurement points supply voltage input output v cc v m v m 1.65 v to 1.95 v 0.5 ? v cc 0.5 ? v cc 2.3 v to 2.7 v 0.5 ? v cc 0.5 ? v cc 2.7v 1.5v 1.5v 3.0v to 3.6v 1.5v 1.5v 4.5 v to 5.5 v 0.5 ? v cc 0.5 ? v cc test data is given in table 10 . definitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 8. test circuit for measuring switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 10. test data supply voltage input load v ext v cc v i t r =t f c l r l t plh , t phl 1.65 v to 1.95 v v cc ? 2.0ns 30pf 1k ? open 2.3 v to 2.7 v v cc ? 2.0ns 30pf 500 ? open 2.7v 2.7v ? 2.5ns 50pf 500 ? open 3.0v to 3.6v 2.7v ? 2.5ns 50pf 500 ? open 4.5 v to 5.5 v v cc ? 2.5ns 50pf 500 ? open
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 8 of 19 nxp semiconductors 74lvc2gu04 dual inverter t amb = 25 ? c. f i = 1 khz. v o is constant. fig 9. typical forward transconductance as a function of supply voltage fig 10. test set-up for measuring forward transconductance 02 1356 v cc (v) 160 120 40 0 80 4 g fs (ma/v) mnb108 mna638 v cc r bias = 560 k input 0.47 f 100 f output a i o v i g fs ? i o ? v i --------- =
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 9 of 19 nxp semiconductors 74lvc2gu04 dual inverter 13. application information some applications are: ? linear amplifier (see figure 11 ) ? in crystal oscillator design (see figure 12 ) remark: all values given are typica l unless otherwise specified. v o(p-p) =v cc ? 1.5 v centered at 0.5v cc . g ol = open loop gain. a u = voltage amplification. r1 ? 3k ? ,r2 ? 1m ? . z l >10k ? ; a ol =20(typical). typical unity gain bandwidth product is 5 mhz. c1 = 47 pf (typical). c2 = 22 pf (typical). r1 = 1 m ? to 10 m ? (typical). r2 optimum value depends on the frequency and required stability against changes in v cc or average minimum i cc (i cc is typically 2 ma at v cc = 3.3 v and f=10mhz). fig 11. linear amplifier configuration fig 12. crystal oscillator configuration u04 r1 r2 v cc z l mna052 1 f mna053 u04 out r2 r1 c1 c2 a u g ol 1 r1 r2 ------ - 1g ol + ?? + ----------------------------------------- - ?=
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 10 of 19 nxp semiconductors 74lvc2gu04 dual inverter 14. package outline fig 13. package outline sot363 (sc-88) references outline version european projection issue date iec jedec jeita sot363 sc-88 wb m b p d e 1 e pin 1 index a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 45 6 plastic surface-mounted package; 6 leads sot363 unit a 1 max b p cd e e 1 h e l p qy wv mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 04-11-08 06-03-16
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 11 of 19 nxp semiconductors 74lvc2gu04 dual inverter fig 14. package outline sot457 (tsop6) references outline version european projection issue date iec jedec jeita sot457 sc-74 wb m b p d e pin 1 index a a 1 l p q detail x h e e v m a a b y scale c x 13 2 4 5 6 0 1 2 mm plastic surface-mounted package (tsop6); 6 leads sot457 unit a 1 b p cd e h e l p qy wv mm 0.1 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.6 0.2 0.33 0.23 a 1.1 0.9 05-11-07 06-03-16
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 12 of 19 nxp semiconductors 74lvc2gu04 dual inverter fig 15. package outline sot886 (xson6) references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886_po 04-07-22 12-01-05 unit mm max nom min 0.5 0.04 1.50 1.45 1.40 1.05 1.00 0.95 0.35 0.30 0.27 0.40 0.35 0.32 0.6 a (1) dimensions (mm are the original dimensions) notes 1. including plating thickness. 2. can be visible in some manufacturing processes. xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm sot886 a 1 b 0.25 0.20 0.17 deee 1 0.5 ll 1 terminal 1 index area d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale 1 6 2 5 3 4 6x (2) 4x (2) a
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 13 of 19 nxp semiconductors 74lvc2gu04 dual inverter fig 16. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes.
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 14 of 19 nxp semiconductors 74lvc2gu04 dual inverter fig 17. package outline sot1115 (xson6) references outline version european projection issue date iec jedec jeita sot1115 sot1115_po 10-04-02 10-04-07 unit mm max nom min 0.35 0.04 0.95 0.90 0.85 1.05 1.00 0.95 0.55 0.3 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm sot1115 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l l 1 b 321 6 5 4 (6) (2) a 1 a
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 15 of 19 nxp semiconductors 74lvc2gu04 dual inverter fig 18. package outline sot1202 (xson6) references outline version european projection issue date iec jedec jeita sot1202 sot1202_po 10-04-02 10-04-06 unit mm max nom min 0.35 0.04 1.05 1.00 0.95 1.05 1.00 0.95 0.55 0.35 0.40 0.35 0.32 a (1) dimensions note 1. including plating thickness. 2. visible depending upon used manufacturing technology. xson6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm sot1202 a 1 b 0.20 0.15 0.12 deee 1 l 0.35 0.30 0.27 l 1 0 0.5 1 mm scale terminal 1 index area d e (4) (2) e 1 e 1 e l b 123 l 1 6 5 4 (6) (2) a a 1
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 16 of 19 nxp semiconductors 74lvc2gu04 dual inverter 15. abbreviations 16. revision history table 11. abbreviations acronym description cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model table 12. revision history document id release date data sheet status change notice supersedes 74lvc2gu04 v.8 20120703 product data sheet - 74lvc2gu04 v.7 modifications: ? package outline drawing of sot886 ( figure 15 ) modified. 74lvc2gu04 v.7 20111128 product data sheet - 74lvc2gu04 v.6 modifications: ? legal pages updated. 74lvc2gu04 v.6 20101027 product data sheet - 74lvc2gu04 v.5 74lvc2gu04 v.5 20091027 product data sheet - 74lvc2gu04 v.4 74lvc2gu04 v.4 20070521 product data sheet - 74lvc2gu04 v.3 74lvc2gu04 v.3 20040921 product specification - 74lvc2gu04 v.2 74lvc2gu04 v.2 20040524 product specification - 74lvc2gu04 v.1 74lvc2gu04 v.1 20030829 product specification - -
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 17 of 19 nxp semiconductors 74lvc2gu04 dual inverter 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 17.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? 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stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74lvc2gu04 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 8 ? 3 july 2012 18 of 19 nxp semiconductors 74lvc2gu04 dual inverter export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 17.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 18. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74lvc2gu04 dual inverter ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 3 july 2012 document identifier: 74lvc2gu04 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 4 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 application information. . . . . . . . . . . . . . . . . . . 9 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 17 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 17.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18 contact information. . . . . . . . . . . . . . . . . . . . . 18 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19


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